Source-Synchronous Networks-On-Chip: Circuit and Architectural Interconnect Modeling

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This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. It provides circuit-level details of the NoC and includes architectural simulations of the NoC.

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Source-Synchronous Networks-On-Chip: Circuit and Architectural Interconnect Modeling
2016, Springer, New York, NY

ISBN-13: 9781493948178

Trade paperback

Source-Synchronous Networks-On-Chip: Circuit and Architectural Interconnect Modeling
2013, Springer, New York, NY

ISBN-13: 9781461494041

2014 edition

Hardcover

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